DCIS2020

DCIS2020

Segovia, Spain. November 18-20th 2020

Menu
  • Home
  • Program
    • Program at a glance
    • Keynotes
    • Panel Session
    • Special Sessions
      • Across the Full-Stack of a Quantum Computer
      • Hardware Security for Electronic Devices
      • Medical Hyperspectral Image Processing
      • Open hardware: an opportunity around and beyond RISC-V
  • Registration
  • Virtual Event
  • Submissions
  • Presentation Guidelines
  • PhD Competition
  • Committees

Open hardware: an opportunity around and beyond RISC-V

Special Session

Organizers:

Lluís Terés, IMB-CNM (CSIC), Spain

Francesc Moll, Universitat Politècnica de Catalunya, Spain

Both members and acting on behalf of Spanish Red-RISCV research network

 

 

The open RISC-V ISA was born in 2010 at UC Berkeley aiming to create an open, advanced, refined and modular instruction set to address the open hardware challenges from the point of view of processor development. Since then, many hardware implementations of RISC-V ISA have been made available as open source code ready for its physical materialization in FPGA, ASIC or SoC.

 

In 2016 the RISC-V Foundation came up to guide the open ISA standard independent evolution. Right now, more than 450 members across 33 countries (about 40 Universities, Research labs. and Alliances; 25 end user industries; 35 Fab & design services; 25 Software tools and 55 chip and component providers) and more than 250 individual members and professional associations are part of the RISC-V Foundation.

 

Looking at the last twenty years software evolution around open source strategies, the open RISC-V ISA is an excellent opportunity to emulate in the hardware world the effect of Linux into software open source. Right now, it is already opening and expanding the market with new companies, avoiding extra costs like royalties and reducing processor cores and components costs. Cooperation among research, industry and academia are easier and much more productive around open source strategies. Even the EU is betting on open architectures such as RISC-V for its future processors, especially since UK and ARM are no longer part of the Union. Definitively, we have the chance to get involved from the early stages into this new wave of open hardware around RISC-V and beyond it.

 

RISC-V acts as a tractor for open hardware, but the concept of open-HW must go further and address any other HW domains beyond processor design. This special session aims to open the discussions around open hardware in general including methodologies, specific cases, sharing/licencing strategies and any other related topic on this wide domain in order to move towards the open hardware ecosystem. Thus, we expect your contributions on any related topic to have the right picture of our community in this domain at the right momentum of it.

 

 

To submit your manuscript, please click on the following link: https://easychair.org/conferences/?conf=dcis2020

Registration

Registration via Whova

Virtual Conference

Attend online via Whova

Get Whova App Now

Whova Attendee User Guide

Contact

Organization

General Chairs

Marisa Lopez-Vallejo, UPM, Spain

Carlos López Barrio, UPM, Spain

 

Program Chairs

Pablo Ituero, UPM, Spain

Jaime Jiménez, UPV/EHU, Spain

 

SEARCH

  • Home
  • Program
    • Program at a glance
    • Keynotes
    • Panel Session
    • Special Sessions
      • Across the Full-Stack of a Quantum Computer
      • Hardware Security for Electronic Devices
      • Medical Hyperspectral Image Processing
      • Open hardware: an opportunity around and beyond RISC-V
  • Registration
  • Virtual Event
  • Submissions
  • Presentation Guidelines
  • PhD Competition
  • Committees

DCIS 2020 | UPM. Precious Lite theme by Flythemes